VHDL Introduction
- A language for describing the structural, physical and behavioral characteristics of digital systems.
- Execution of a VHDL program results in a simulation of the digital system.
- Allows us to validate the design prior to fabrication.
- The definition of the VHDL language provides a range of features that support simulation of digital systems.
- VHDL supports both structural and behavioral descriptions of a system at multiple levels of abstraction.
- Structure and behavior are complementary ways of describing systems.
- A description of the behavior of a system says nothing about the structure or the components that make up the system.
- There are many ways in which you can build a system to provide the same behavior.
Basic Language Concepts
- Signals : Like variables in a programming language such as C, signals can be assigned values, example 0, 1, Z.
- However, signals also have an associated time value .
- A signal receives a value at a specific point in time and retains that value until it receives a new value at a future point in time.
- The sequence of values assigned to a signal over time is the waveform of the signal.
- A variable always has one current value.
At any instant in time, a signal may be associated with several time-value pairs.
Entity-Architecture
- Design entity: A component of a system whose behavior is to be described and simulated.
- Two components to the description:
- The interface to the design: entity declaration.
- The internal behavior of the design: architecture construct.